澜起科技校园招聘简章

一、      澜起简介：

作为业界领先的集成电路设计公司之一，澜起科技致力于为云计算和人工智能领域提供高性能芯片解决方案。公司在内存接口芯片市场深耕十余年，先后推出了DDR2、DDR3、DDR4系列高速、大容量内存缓冲解决方案，以满足云计算数据中心对数据速率和容量日益增长的需求。澜起科技发明的DDR4全缓冲“1+9”架构被JEDEC采纳为国际标准，其相关产品已成功进入全球主流内存、服务器和云计算领域，占据国际市场的主要份额。

2016年以来，澜起科技与清华大学、英特尔鼎力合作，研发出津逮®系列CPU。基于津逮®CPU及澜起科技的安全内存模组而搭建的津逮®服务器平台，实现了芯片级实时安全监控功能，为云计算数据中心提供更为安全、可靠的运算平台。此平台还融合了先进的异构计算与互联技术，可为大数据及人工智能时代的各种应用提供强大的综合数据处理及计算力支撑。

澜起科技成立于2004年，总部设在上海并在昆山、澳门、美国硅谷和韩国首尔设有分支机构。

2019年7月22日澜起科技成功在上交所科创板上市，股票代码：688008，成为首批科创板上市企业中市值最高的集成电路企业。

 

欲了解更多信息，欢迎访问公司官网：www.montage–tech.com

 

二、      招聘岗位：

工作地点：昆山开发区夏东街628号

职位	学历	专业
模拟设计工程师	硕士及以上	微电子、集成电路设计、电子相关专业
数字设计工程师	硕士及以上	微电子、集成电路设计、电子相关专业
设计验证工程师	硕士及以上	微电子、集成电路设计、电子相关专业
算法工程师	硕士及以上	微电子、集成电路设计、电子相关、计算机、软件、数学相关专业
测试工程师	本科及以上	计算机、软件、通信、电子相关专业
硬件工程师	硕士及以上	计算机、软件、通信、电子相关专业
软件工程师	硕士及以上	计算机、软件、通信、电子相关专业
测试开发工程师	本科及以上	电子、通信、软件相关专业
产品工程师	本科及以上	电子、通信相关专业
封装工程师	本科及以上	微电子、材料、电子相关专业
晶圆工艺工程师	本科及以上	电子、通信、物理、化学、材料科学相关专业
失效分析工程师	本科及以上	电子、通信、物理、化学、材料科学相关专业

 

 

 

JOB TITLE: Analog Design Engineer 模拟设计工程师

JOB DESCRIPTION:

1 Design, evaluate and verify analog/mixed circuits；

2 Work closely with layout engineer for layout implementation；

3 Engineering lab test and chip debug；

4 Technical documentation for design, lab test, circuit analysis.

QUALIFICATION:

1 MS in electric and electronic engineering；

2 Good fundamental in design and analysis of analog/mixed circuit；

3 Good understanding in CMOS process technology and device physics；

4 Experience in behavioral modeling by Verilog and/or Matlab；

5 Familiar with EDA tools (Virtuoso, spectre, HSPICE, calibre, etc)；

6 Design experience in any of the following areas is preferred: SerDes, high-speed I/O’s, PHY, PCIe, USB, DC/DC Buck.

 

JOB TITLE: Digital Design Engineer 数字设计工程师

JOB DESCRIPTION:

1 Write Micro-Architecture Definition/Writing Design Implementation Spec；

2 Write RTL coding for block or top level；

3 Do IP level synthesis / timing analysis / formality check / CDC check /Code coverage check；

4 Assist on Verification Engineer to complete module and top level simulation and verification;

5 Debug RTL/Gate Level waveform at module or top level;

6 Do Silicon debugging of the related module functionalities and provide ECO solution accordingly.

QUALIFICATION:

1 MS in electric and electronic engineering；

2 Skills of Verilog RTL coding, simulation debug and base or metal layer ECO;

3 Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc;

4 Skills of Script and be familiar with TCL, Perl, etc.

5 Self-motivated, good team work spirit and good communication skills.

 

JOB TITLE: Design Verification Engineer 设计验证工程师

JOB DESCRIPTION:

1 Participate ASIC digital verification for various IP/SoC projects;

2 Create verification plans with designers;

3 Develop DV architecture and verification environment;

4 Verification execution and sign-off;

QUALIFICATION:

1 MS in electric and electronic engineering

2 Excellent team working style;

3 Solid IP/SoC verification background:

4 Mass production for verified IP/SoC

5 Production experiences on verification strategies and testplans;

6 Familiar with SystemVerilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;

7 Production experiences on ARM buses, such as AXI/AMBA/APB is a plus;

8 Familiar with verification tools ;

9 Familiar with Linux, csh/Python or any script languages;

10 Good English skills (read and write).

 

JOB TITLE: Algorithm Engineer 算法工程师

JOB DESCRIPTION:

1. RD on algorithms related to deep learning;

2. Support RTL implementation

 

QUALIFICATIONS:

1. M.S. in Computer Science, Electrical, or Applied Mathematics, with the background of machine learning, signal processing or numeral calculations;

2. Excellent programming expertise (python, or c/c++) required, familiar with data structure;

3. Experience with deep learning, including image/audio processing or NLP;

3. At least familiar with one deep learning framework (tensorflow/pytorch/mxnet/paddlepaddle or others);

5. Self-motivated, good team work spirit and good communication skills

 

JOB TITLE: Test Engineer（Platform/IC）测试工程师

JOB DESCRIPTION: 

1 Work on board level chip/system function verification and performance test. 

2 Do chip validation and test together with design team. 

3 Develop and merge the auto-test for chip test interface in server/bench. 

4 Analyze bug of our product and failure of customer return.

5 Server platform performance test and fine tuning.  

QUALIFICATION:

1 Bachelor degree in electrical and electronic engineering

2 BSEE with IC test experience is a plus. 

3 Experience in C language, familiar with python programming is a plus.

4 Familiar with lab equipments, such as oscilloscope, logic analyzer, BERT, etc 

5 Familiar with x86 architecture, and familar with CPU/Memory/IO performance test is a plus;

6 Good communication skill, team work spirit, self-motivated. 

7 Quick learner.

 

JOB TITLE: Hardware Engineer 硬件工程师

JOB DESCRIPTION:

1   Schematic design;

2   PCB board debugging; 3   High speed signal simulation and test;

4   chip’s validation and test work;

QUALIFICATIONS:

1  Master degree of computer science or electronics

2   Understand Analog/Digital circuit such as power, PCIe/USB  interface   etc., know high speed design.

3   Could use test devices such as scope, signal generator, and analyzer etc.;

4   Good analysis capability and problem solving capability；

5   Easy-going, with a strong sense of responsibility and good team-spirit; 6   Quick learner.

 

JOB TITLE: Software Engineer 软件工程师

JOB DESCRIPTION: 

1Software development for Jintide CPU product such as：

-Linux driver development

- software application for chip

-Toolkit development for chip/system test/validation.

QUALIFICATION:

1 Master degree of computer science or electronics

2 Familiar with c language is necessary;

3 Script language such as python/Perl is plus

4 Good communication skill, team work spirit, self-motivated;

 

JOB TITLE: Test Development Engineer 测试开发工程师（ATE）

JOB DESCRIPTION:

1 Play a role in meeting corporate goals with your experience to develop ATE test hardware + software to support IC design center;

2 To develop/convert/migrate hardware + software between test systems to increase test coverage and production throughput;

3 Enhance the existing test techniques for maximum test quality to minimize customer returns and to reduce test time;

4 To customize existing test hardware to PCBs for test repeatability, cost effective, maintenance and productive debugging;

5 To procure essential instruments to continuously upgrade test engineering lab for bench-to-tester correlation;

6 To develop software tools to reduce test program development cycle time by automating generation of test programs from libraries of proven test methods;

7 Setup/transfer new products and technology for production off-load at off-shore.

QUALIFICATIONS:

1 BSEE/MSEE in Electronics/Electrical Engineering;

2 Knowledgeable in Teradyne J750 Catalyst or Advantest 93K ATE systems is a plus;

3 Able to understand, debug, modify and improve test program;

4 Able to manage sub-contractors at different locations;

5 Process a good sense of responsibility and positive working attitude;

6 Willing to travel at short notice;

7 Good written and oral communications skills;

 

JOB TITLE: Product Engineer 产品工程师

JOB DESCRIPTION:

1 Support product qualification(Characterization/Correlation/ESD/LU/LifeTest/CornerLot, etc) and maintain /enhance test yield and quality of devices in final test(FT) as well as wafer sort(CP);

2 Work on all issues related to device performance, undertake projects to reduce test cost and cycle time, and improve test efficiency;

3 Highly independent in developing product test solutions to existing and new requirements, attend to customers' feedback;

4 To work with internal teams (design, application etc.), sub-contractor (foundry, Assembly&Test etc.) and customer at all time;

5 Setup/transfer new products and technology for mass production in domestic and off-shore.

QUALIFICATIONS:

1 Knowledge of IC product qualification(Characterization/Correlation/ESD/LU/Life Test/Corner Lot, etc);

2 Knowledge of ATE testing, DFT/DFM and data analysis is prefered;

3 Process a good sense of responsibility and positive working attitude;

4 Willing to travel at short notice; - Degree in Electronics/Electrical Engineering;

5 Good written and oral communications skills;

6 Ability to understand, debug, modify and improve test program is prefered;

7 Able to perform low yield analysis and drive issue fixing for products;

8 Able to manage sub-contractors in different locations.

 

JOB TITLE: Packaging Engineer封装工程师

 

JOB DESCRIPTION:

1.Package design feasibility study to provide the more competitive package solution; Co-work with R&D team to optimize and generate the Bump map and Ball map.

2.Responsible for completing package designs; review the design files with subcon and substrate vendor; generate the package simulation model.

3.Optimize the assembly process and substrate built process to improve yield, reliability and cost saving.

4.Periodically survey the assembly technology and substrate build technology to update design rule.

 

QUALIFICATIONS:

1.Education: Bachelor Degree or above,  Master is preferred. Major in microelectronics, material etc.

2.Skillful in PCB or Substrate design tool.

3.Have basic understanding about electromagnetic field, thermal and mechanical.

4.Knowledge about semi-conductor process is a plus.

 

JOB TITLE: Foundry Process Engineer 晶圆工艺工程师

JOB DESCRIPTION:

1.      Work with both fab and internal teams to handle product yield& reliability issues and strive for continuous improvement.

2.      Support design enables in product development phase, including problem solving for circuitry simulation, device operation, reliability assurance, layout, tape out, etc.

3.      Track emerging technologies, like MRAM/RRAM, for AI and big data applications.

 

QUALIFICATION:

1.      BS or MS major in Micro Electronics/Electrical Engineering/Physics/Material Science.

2.      Knowledge of solid state device with emphasis on MOS devices is essential.

3.      Good understanding of logic or memory product manufacture process is preferred.

4.      Strong sense on statistics knowledge and analysis, like normal distribution, significance test.

5.      Be familiar with IC design flow and circuits principle is a plus.

6.      Good written and oral English.

 

 

JOB TITLE: Failure Analysis Engineer失效分析工程师

Responsibility:

1.      Electrical level analysis on failed device, using the equipments/test bench available in lab, or setup necessary test bench by yourself to do the test on specific circuit block. Based on the test result and die schematic/circuit analysis & comparison to come out a possible defect circuit/point, and submit the electrical analysis report.

2.      Co-work with physical FA engineer and 3rd party FA lab, using related physical FA method to do the destructive FA on failed device, and find the physical defect/damage point on the device.

 

Qualifications:

1.      Bachelor or above degree major in Electronics Engineering, Microelectronics, Semiconductor Physics or relevant;

2.      Top 10% score on technology courses including Digital Electronic Technology, Analog Electronic Technology, Semiconductor Physics, Process Technology of Integrated Circuits etc,

3.      Basic knowledge on test hardware and server test platform;

 

三、      宣讲会行程：

华东地区

9.16 上海市 上海交通大学

9.17 南京市 南京邮电大学

9.18 南京市 东南大学

9.19 南京市  南京大学

10.9 上海市 复旦大学

西南地区

9.16 成都市  四川大学

9.17 成都市  电子科技大学

西北地区

9.19 西安市  西安电子科技大学

9.20 西安市  西安交通大学

华中地区

9.24 武汉市  华中科技大学

9.25 武汉市  新葡的京集团3512vip-首页

东北地区

9.24 长春市  吉林大学

9.26 沈阳市  东北大学

 

具体安排请扫描下方二维码，点击招聘流程→宣讲行程获悉。

 

四、      应聘方式：

1、 网申投递：http://evp.51job.com/2020/montage

2、 Email投递:hr@montage-tech.com(邮件标题请注明：学校+学历+姓名+职位)

3、 扫码投递：

 

 

 

 

 

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